45 search results - page 4 / 9 » vlsid 2005 |
VLSID
2005
IEEE
14 years 7 months ago
2005
IEEE
One of the main challenges for design in the presence of process variations is to cope with the uncertainties in delay and leakage power. In this paper, the influence of leakage r...
VLSID
2005
IEEE
14 years 7 months ago
2005
IEEE
Synchronous design methods have intrinsic performance overheads due to their use of the global clock and timing assumptions. In future manufacturing processes not only may it beco...
VLSID
2005
IEEE
14 years 7 months ago
2005
IEEE
In this paper, we have studied and compared the RF performance metrics, unity gain frequency (ft) and Noise Figure (NF), of the devices with channel engineering consisting of halo...
VLSID
2005
IEEE
14 years 7 months ago
2005
IEEE
We propose a method to minimize power dissipation in current-mode CMOS analog and multiple-valued logic (MVL) circuits employing a stack of current comparators. First, we present ...
VLSID
2005
IEEE
14 years 7 months ago
2005
IEEE
: The direct result of shrinking devices is not only higher densities but also increased switching activity and thus higher device temperatures. The variation in temperature over t...