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ISCA
2000
IEEE
156views Hardware» more  ISCA 2000»
14 years 2 days ago
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit
Reconfigurable hardware has the potential for significant performance improvements by providing support for applicationāˆ’specific operations. We report our experience with Chimae...
Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithv...
TVCG
2008
174views more  TVCG 2008»
13 years 7 months ago
Data-Driven Visualization and Group Analysis of Multichannel EEG Coherence with Functional Units
Abstract-- A typical data-driven visualization of electroencephalography (EEG) coherence is a graph layout, with vertices representing electrodes and edges representing significant...
Michael ten Caat, Natasha M. Maurits, Jos B. T. M....
PACS
2000
Springer
118views Hardware» more  PACS 2000»
13 years 11 months ago
Ramp Up/Down Functional Unit to Reduce Step Power
Because the inductive noise Ldi/dt is induced by the power change and can have disastrous impact on the timing and reliability of the system, high-performance CPU designs are more ...
Zhenyu Tang, Norman Chang, Shen Lin, Weize Xie, O....
FCCM
1997
IEEE
129views VLSI» more  FCCM 1997»
13 years 12 months ago
The Chimaera reconfigurable functional unit
By strictly separating reconfigurable logic from their host processor, current custom computing systems suffer from a significant communication bottleneck. In this paper we descri...
Scott Hauck, Thomas W. Fry, Matthew M. Hosler, Jef...