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APCSAC
2001
IEEE
15 years 9 months ago
Exploiting Java Instruction/Thread Level Parallelism with Horizontal Multithreading
Java bytecodes can be executed with the following three methods: a Java interpretor running on a particular machine interprets bytecodes; a Just-In-Time (JIT) compiler translates ...
Kenji Watanabe, Wanming Chu, Yamin Li
ICCAD
1995
IEEE
134views Hardware» more  ICCAD 1995»
15 years 9 months ago
A delay model for logic synthesis of continuously-sized networks
ng certain electrical noise and power constraints.Abstract: We present a new delay model for use in logic synthesis. A traditional model treats the area of a library cell as consta...
Joel Grodstein, Eric Lehman, Heather Harkness, Bil...
COMPSAC
2008
IEEE
15 years 12 months ago
Safety in Automotive Software: An Overview of Current Practices
Electronic control units and on-board networks for automotive applications cover a big variety of functions that in many cases are responsible of safetycritical behavior of the ve...
Paolo Panaroni, Giovanni Sartori, Fabrizio Fabbrin...
EMSOFT
2006
Springer
15 years 9 months ago
Compiler-assisted leakage energy optimization for clustered VLIW architectures
Miniaturization of devices and the ensuing decrease in the threshold voltage has led to a substantial increase in the leakage component of the total processor energy consumption. ...
Rahul Nagpal, Y. N. Srikant
MOC
2002
80views more  MOC 2002»
15 years 5 months ago
Component-by-component construction of good lattice rules
This paper provides a novel approach to the construction of good lattice rules for the integration of Korobov classes of periodic functions over the unit s-dimensional cube. Theore...
Ian H. Sloan, Andrew V. Reztsov