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FCCM
2003
IEEE
113views VLSI» more  FCCM 2003»
14 years 3 months ago
Issues and Approaches to Coarse-Grain Reconfigurable Architecture Development
Although domain-specialized FPGAs can offer significant area, speed and power improvements over conventional reconfigurable devices, there are several unique and unexplored design...
Kenneth Eguro, Scott Hauck
ASPLOS
2000
ACM
14 years 2 months ago
Communication Scheduling
The high arithmetic rates of media processing applications require architectures with tens to hundreds of functional units, multiple register files, and explicit interconnect betw...
Peter R. Mattson, William J. Dally, Scott Rixner, ...
CGO
2004
IEEE
14 years 1 months ago
FLASH: Foresighted Latency-Aware Scheduling Heuristic for Processors with Customized Datapaths
Application-specific instruction set processors (ASIPs) have the potential to meet the challenging cost, performance, and power goals of future embedded processors by customizing ...
Manjunath Kudlur, Kevin Fan, Michael L. Chu, Rajiv...
GLVLSI
2010
IEEE
168views VLSI» more  GLVLSI 2010»
13 years 10 months ago
A revisit to voltage partitioning problem
We revisit voltage partitioning problem when the mapped voltages of functional units are predetermined. If energy consumption is estimated by formulation E = CV 2 , a published wo...
Tao Lin, Sheqin Dong, Bei Yu, Song Chen, Satoshi G...
HASKELL
2006
ACM
14 years 4 months ago
Strongly typed memory areas programming systems-level data structures in a functional language
Modern functional languages offer several attractive features to support development of reliable and secure software. However, in our efforts to use Haskell for systems programmin...
Iavor S. Diatchki, Mark P. Jones