Sciweavers

VTS
2002
IEEE
108views Hardware» more  VTS 2002»
14 years 4 months ago
On Using Efficient Test Sequences for BIST
High defect coverage requires good coverage of different fault types. In this paper, we present a comprehensive test vector generation technique for BIST, called Random Single Inp...
René David, Patrick Girard, Christian Landr...
DAC
2002
ACM
15 years 13 days ago
Embedded software-based self-testing for SoC design
At-speed testing of high-speed circuits is becoming increasingly difficult with external testers due to the growing gap between design and tester performance, growing cost of high...
Angela Krstic, Wei-Cheng Lai, Kwang-Ting Cheng, Li...