Sciweavers

DAC
2005
ACM
14 years 24 days ago
Faster and better global placement by a new transportation algorithm
We present BonnPlace, a new VLSI placement algorithm that combines the advantages of analytical and partitioning-based placers. Based on (non-disjoint) placements minimizing the t...
Ulrich Brenner, Markus Struzyna
DAC
2005
ACM
14 years 24 days ago
Template-driven parasitic-aware optimization of analog integrated circuit layouts
Layout parasitics have great impact on analog circuit performance. This paper presents an algorithm for explicit parasitic control during layout retargeting of analog integrated c...
Sambuddha Bhattacharya, Nuttorn Jangkrajarng, C.-J...
DAC
2005
ACM
14 years 24 days ago
Matlab as a development environment for FPGA design
In this paper we discuss an efficient design flow from Matlab® to FPGA. Employing Matlab for algorithm research and as system level language allows efficient transition from algo...
Tejas M. Bhatt, Dennis McCain
DAC
2005
ACM
14 years 24 days ago
Mixed signal design space exploration through analog platforms
We propose a hierarchical mixed signal design methodology based on the principles of Platform-Based Design (PBD). The methodology is a meet-in-the-middle approach where design com...
Fernando De Bernardinis, Pierluigi Nuzzo, Alberto ...
DAC
2005
ACM
14 years 24 days ago
Dynamic reconfiguration with binary translation: breaking the ILP barrier with software compatibility
In this paper we present the impact of dynamically translating any sequence of instructions into combinational logic. The proposed approach combines a reconfigurable architecture ...
Antonio Carlos Schneider Beck, Luigi Carro
DAC
2005
ACM
14 years 24 days ago
Spatially distributed 3D circuit models
Spatially distributed 3D circuit models are extracted with a segmentto-segment BEM (Boundary Element Method) algorithm for both capacitance and inverse inductance couplings rather...
Michael W. Beattie, Hui Zheng, Anirudh Devgan, Byr...
DAC
2005
ACM
14 years 24 days ago
Wireless platforms: GOPS for cents and MilliWatts
Francine Bacchini, Jan M. Rabaey, Allan Cox, Frank...
DAC
2005
ACM
14 years 24 days ago
Is methodology the highway out of verification hell?
Francine Bacchini, Gabe Moretti, Harry Foster, Jan...
DAC
2005
ACM
14 years 24 days ago
TCAM enabled on-chip logic minimization
This paper presents an efficient hardware architecture of an on-chip logic minimization coprocessor. The proposed architecture employs TCAM cells to provide fastest and memory eï¬...
Seraj Ahmad, Rabi N. Mahapatra
DAC
2005
ACM
14 years 24 days ago
Circuit optimization using statistical static timing analysis
In this paper, we propose a new sensitivity based, statistical gate sizing method. Since circuit optimization effects the entire shape of the circuit delay distribution, it is dif...
Aseem Agarwal, Kaviraj Chopra, David Blaauw, Vladi...