Sciweavers

DAC
1995
ACM
14 years 3 months ago
The Validity of Retiming Sequential Circuits
Retiming has been proposed as an optimizationstep forsequential circuits represented at the net-list level. Retiming moves the latches across the logic gates and in doing so chang...
Vigyan Singhal, Carl Pixley, Richard L. Rudell, Ro...
DAC
1995
ACM
14 years 3 months ago
The Case for Design Using the World Wide Web
— Most information and services required today by designers will soon become available as documents distributed in a wide area hypermedia network. New integration services are re...
Mário J. Silva, Randy H. Katz
DAC
1995
ACM
14 years 3 months ago
Multi-way Partitioning for Minimum Delay for Look-Up Table Based FPGAs
In this paper we present a set cover based approach (SCP) to multi-way partitioning for minimum delay for Look-Up Table based FPGAs. SCP minimizes the number of chip-crossings on ...
Prashant Sawkar, Donald E. Thomas
DAC
1995
ACM
14 years 3 months ago
Automatic Layout Synthesis of Leaf Cells
––This paper describes algorithms for automatic layout synthesisofleafcellsin1–dandinanew1–1/2–dlayoutstyle,useful for non–dual circuit styles. The graph theory based a...
Sanjay Rekhi, J. Donald Trotter, Daniel H. Linder
DAC
1995
ACM
14 years 3 months ago
Rephasing: A Transformation Technique for the Manipulation of Timing Constraints
- We introduce a transformation, named rephasing, that manipulates the timing parameters in control-dataflow graphs. Traditionally high-level synthesis systems for DSP have either ...
Miodrag Potkonjak, Mani B. Srivastava
DAC
1995
ACM
14 years 3 months ago
Data Path Allocation for Synthesizing RTL Designs with Low BIST Area Overhead
Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breue...
DAC
1995
ACM
14 years 3 months ago
Orthogonal Greedy Coupling - A New Optimization Approach to 2-D FPGA Routing
We propose a novel optimization scheme that can improve the routing by reducing a newly observed router decaying effect. A pair of greedy-grow algorithms, each emphasizing a diffe...
Yu-Liang Wu, Malgorzata Marek-Sadowska
DAC
1995
ACM
14 years 3 months ago
Extreme Delay Sensitivity and the Worst-Case Switching Activity in VLSI Circuits
Abstract We observe that the switching activity at a circuit node, also called the transition density, can be extremely sensitive to the circuit internal delays. As a result, sligh...
Farid N. Najm, Michael Y. Zhang
DAC
1995
ACM
14 years 3 months ago
Power Estimation in Sequential Circuits
Abstract A new method for power estimation in sequential circuits is presented that is based on a statistical estimation technique. By applying randomly generated input sequences t...
Farid N. Najm, Shashank Goel, Ibrahim N. Hajj
DAC
1995
ACM
14 years 3 months ago
Feedback, Correlation, and Delay Concerns in the Power Estimation of VLSI Circuits
With the advent of portable and high-density microelectronic devices, the power dissipation of integrated circuits has become a critical concern. Accurate and e cient power estimat...
Farid N. Najm