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    DAC
    1995
    ACM
    106views Computer Architecture» more  DAC 1995»
    The Validity of Retiming Sequential Circuits
    14 years 2 months ago
    The Validity of Retiming Sequential Circuits
    Download  www.eecs.berkeley.edu
    Retiming has been proposed as an optimizationstep forsequential circuits represented at the net-list level. Retiming moves the latches across the logic gates and in doing so chang...
    Vigyan Singhal, Carl Pixley, Richard L. Rudell, Ro...
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    DAC
    1995
    ACM
    230views Computer Architecture» more  DAC 1995»
    The Case for Design Using the World Wide Web
    14 years 2 months ago
    The Case for Design Using the World Wide Web
    Download  ftp.ics.uci.edu
    — Most information and services required today by designers will soon become available as documents distributed in a wide area hypermedia network. New integration services are re...
    Mário J. Silva, Randy H. Katz
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    DAC
    1995
    ACM
    139views Computer Architecture» more  DAC 1995»
    Multi-way Partitioning for Minimum Delay for Look-Up Table Based FPGAs
    14 years 2 months ago
    Multi-way Partitioning for Minimum Delay for Look-Up Table Based FPGAs
    Download  www.cecs.uci.edu
    In this paper we present a set cover based approach (SCP) to multi-way partitioning for minimum delay for Look-Up Table based FPGAs. SCP minimizes the number of chip-crossings on ...
    Prashant Sawkar, Donald E. Thomas
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    DAC
    1995
    ACM
    140views Computer Architecture» more  DAC 1995»
    Automatic Layout Synthesis of Leaf Cells
    14 years 2 months ago
    Automatic Layout Synthesis of Leaf Cells
    Download  www.cecs.uci.edu
    ––This paper describes algorithms for automatic layout synthesisofleafcellsin1–dandinanew1–1/2–dlayoutstyle,useful for non–dual circuit styles. The graph theory based a...
    Sanjay Rekhi, J. Donald Trotter, Daniel H. Linder
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    DAC
    1995
    ACM
    129views Computer Architecture» more  DAC 1995»
    Rephasing: A Transformation Technique for the Manipulation of Timing Constraints
    14 years 2 months ago
    Rephasing: A Transformation Technique for the Manipulation of Timing Constraints
    Download  www.cs.ucla.edu
    - We introduce a transformation, named rephasing, that manipulates the timing parameters in control-dataflow graphs. Traditionally high-level synthesis systems for DSP have either ...
    Miodrag Potkonjak, Mani B. Srivastava
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    DAC
    1995
    ACM
    129views Computer Architecture» more  DAC 1995»
    Data Path Allocation for Synthesizing RTL Designs with Low BIST Area Overhead
    14 years 2 months ago
    Data Path Allocation for Synthesizing RTL Designs with Low BIST Area Overhead
    Download  poisson.usc.edu
    Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breue...
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    DAC
    1995
    ACM
    130views Computer Architecture» more  DAC 1995»
    Orthogonal Greedy Coupling - A New Optimization Approach to 2-D FPGA Routing
    14 years 2 months ago
    Orthogonal Greedy Coupling - A New Optimization Approach to 2-D FPGA Routing
    Download  www.cecs.uci.edu
    We propose a novel optimization scheme that can improve the routing by reducing a newly observed router decaying effect. A pair of greedy-grow algorithms, each emphasizing a diffe...
    Yu-Liang Wu, Malgorzata Marek-Sadowska
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    DAC
    1995
    ACM
    124views Computer Architecture» more  DAC 1995»
    Extreme Delay Sensitivity and the Worst-Case Switching Activity in VLSI Circuits
    14 years 2 months ago
    Extreme Delay Sensitivity and the Worst-Case Switching Activity in VLSI Circuits
    Download  www.eecg.toronto.edu
    Abstract We observe that the switching activity at a circuit node, also called the transition density, can be extremely sensitive to the circuit internal delays. As a result, sligh...
    Farid N. Najm, Michael Y. Zhang
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    DAC
    1995
    ACM
    122views Computer Architecture» more  DAC 1995»
    Power Estimation in Sequential Circuits
    14 years 2 months ago
    Power Estimation in Sequential Circuits
    Download  www.eecg.toronto.edu
    Abstract A new method for power estimation in sequential circuits is presented that is based on a statistical estimation technique. By applying randomly generated input sequences t...
    Farid N. Najm, Shashank Goel, Ibrahim N. Hajj
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    DAC
    1995
    ACM
    93views Computer Architecture» more  DAC 1995»
    Feedback, Correlation, and Delay Concerns in the Power Estimation of VLSI Circuits
    14 years 2 months ago
    Feedback, Correlation, and Delay Concerns in the Power Estimation of VLSI Circuits
    Download  www.eecg.toronto.edu
    With the advent of portable and high-density microelectronic devices, the power dissipation of integrated circuits has become a critical concern. Accurate and e cient power estimat...
    Farid N. Najm
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