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DAC
1994
ACM
14 years 3 months ago
Automatic Verification of Pipelined Microprocessors
Abstract - We address the problem of automatically verifying large digital designs at the logic level, against high-level specifications. In this paper, we present a methodology wh...
Vishal Bhagwati, Srinivas Devadas
DAC
1994
ACM
14 years 3 months ago
Chain Closure: A Problem in Molecular CAD
Conformational analysis is the problem of nding all minimal energy three-dimensional con gurations of molecules. Cyclic structures are of particular interest. An ecient algorithm...
Maria Domenica Di Benedetto, Pasquale Lucibello, A...
DAC
1994
ACM
14 years 3 months ago
Design Methodology Management Using Graph Grammars
In this paper, we present a design methodology management system, which assists designers in selecting a suitable design process and invoking the selected sequence of tools on the...
Reid A. Baldwin, Moon-Jung Chung
DAC
1994
ACM
14 years 3 months ago
HSIS: A BDD-Based Environment for Formal Verification
Functional and timing verification are currently the bottlenecks in many design efforts. Simulation and emulation are extensively used for verification. Formal verification is now...
Adnan Aziz, Felice Balarin, Szu-Tsung Cheng, Ramin...
DAC
1994
ACM
14 years 3 months ago
The Design of High-Performance Microprocessors at Digital
Today's high-performance single-chip CMOS microprocessors are the most complex and challenging chip designs ever implemented. To stay on the leading edge, Digital's micro...
Thomas F. Fox
DAC
1994
ACM
14 years 3 months ago
BDD Variable Ordering for Interacting Finite State Machines
We address the problem of obtaining good variable orderings for the BDD representation of a system of interacting finite state machines (FSMs). Orderings are derived from the comm...
Adnan Aziz, Serdar Tasiran, Robert K. Brayton
DAC
1993
ACM
14 years 3 months ago
Espresso-Signature: A New Exact Minimizer for Logic Functions
Patrick C. McGeer, Jagesh V. Sanghavi, Robert K. B...
DAC
1993
ACM
14 years 3 months ago
A Negative Reinforcement Method for PGA Routing
We present an efficient and effective method for the detailed routing of symmetrical or sea-of-gates FPGA architectures. Instead of breaking the problem into 2-terminal net collec...
Forbes D. Lewis, Wang Chia-Chi Pong