The verification of large radio-frequency/millimeter-wave (RF/MM) integrated circuits (ICs) has regained attention for high-performance designs beyond 90nm and 60GHz. The traditio...
Numerous algorithms to macromodel a linear time-invariant (LTI) system from its frequency-domain sampling data have been proposed in recent years [1, 2, 3, 4, 5, 6, 7, 8], among w...
Yuanzhe Wang, Chi-Un Lei, Grantham K. H. Pang, Nga...
Integrating a large number of on-chip voltage regulators holds the promise of solving many power delivery challenges through strong local load regulation and facilitates systemlev...
This paper presents Xetal-Pro SIMD processor, which is based on Xetal-II, one of the most computational-efficient (in terms of GOPS/Watt) processors available today. XetalPro supp...
Yifan He, Yu Pu, Richard P. Kleihorst, Zhenyu Ye, ...
Clock meshes are extremely effective at filtering clock skew from environmental and process variations. For this reason, clock meshes are used in most high performance designs. Ho...
A three-dimensional (3D) CMOS imager constructed by stacking a pixel array of backside illuminated sensors, an analog-to-digital converter (ADC) array, and an image signal process...
As high-level models in C and SystemC are increasingly used for verification and even design (through high-level synthesis) of electronic systems, there is a growing need for com...
Packet-switched networks-on-chip (NoC) have been proposed as an efficient communication infrastructure for multi-core architectures. Adding virtual channels to a NoC helps to avoi...
In this paper, we propose a novel multi-mode/multi-corner sparse regression (MSR) algorithm to build large-scale performance models of integrated circuits at multiple working mode...
Wangyang Zhang, Tsung-Hao Chen, Ming Yuan Ting, Xi...