This paper presents a compact Nonlinear model Order Reduction Method (NORM) that is applicable for time-invariant and time-varying weakly nonlinear systems. NORM is suitable for r...
Coverage estimation for model checking quantifies the completeness of a set of properties. We present an improved version of the algorithm of Hoskote et al. [7] that applies to a...
This paper describes a new force directed global placement algorithm that exploits and extends techniques from two leading placers, Force-directed [12] [26] and Mongrel [22]. It c...
Conventional register transfer level (RTL) debugging is based on overlaying simulation results on structural connectivity information of the Hardware Description Language (HDL) so...
The increasing use of microprocessor cores in embedded systems as well as mobile and portable devices creates an opportunity for customizing the cache subsystem for improved perfo...
This paper presents a new algorithm based on Integrated Congruence transform for the analysis of both uniform and nonuniform transmission lines. The key advantage of the proposed ...
The design of state-of-the-art, complex embedded systems requires the capability of modeling and simulating the complex networked environment in which such systems operate. This i...
Franco Fummi, Giovanni Perbellini, Paolo Gallo, Ma...
Fourth-generation wireless communication systems (4G) will have totally different requirements than what front-end designers have been coping with up to now. Designs must be targe...
This paper presents an analytical framework for the implementation of digital infinite impulse response filters in fixed-point hardware on field programmable gate arrays. This ana...
Joan Carletta, Robert J. Veillette, Frederick W. K...
This paper describes a low-power design methodology for a bus architecture based on hybrid current/voltage mode signaling for deep sub-micrometer on-chip interconnects that achiev...
Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III