Sciweavers

IEEEPACT
2000
IEEE
14 years 6 days ago
Instruction Scheduling for Clustered VLIW DSPs
Recent digital signal processors (DSPs) show a homogeneous VLIW-like data path architecture, which allows C compilers to generate efficient code. However, still some special rest...
Rainer Leupers
IEEEPACT
2000
IEEE
14 years 6 days ago
On Some Implementation Issues for Value Prediction on Wide-Issue ILP Processors
In this paper, we look at two issues which could affect the performance of value prediction on wide-issue ILP processors. One is the large number of accesses to the value predicti...
Sang Jeong Lee, Pen-Chung Yew
IEEEPACT
2000
IEEE
14 years 6 days ago
Neighborhood Prefetching on Multiprocessors Using Instruction History
A multiprocessor prefetch scheme is described in which a miss is followed by a prefetch of a group of lines, a neighborhood, surrounding the demand-fetched line. The neighborhood ...
David M. Koppelman
IEEEPACT
2000
IEEE
14 years 6 days ago
Exploring Sub-Block Value Reuse for Superscalar Processors
The performance potential of a value reuse mechanism depends on its reuse detection time, the number of reuse opportunities, and the amount of work saved by skipping each reuse un...
Jian Huang, David J. Lilja
IEEEPACT
2000
IEEE
14 years 6 days ago
Dynamic Branch Prediction for a VLIW Processor
This paper describes the design of a dynamic branchpredictorfor a VLIW processor. The developed branch predictor predicts the direction of a branch, i.e., taken or not taken, and ...
Jan Hoogerbrugge
IEEEPACT
2000
IEEE
14 years 6 days ago
Global Register Partitioning
Modern computers have taken advantage of the instruction-level parallelism (ILP) available in programs with advances in both architecture and compiler design. Unfortunately, large...
Jason Hiser, Steve Carr, Philip H. Sweany
IEEEPACT
2000
IEEE
14 years 6 days ago
A Lightweight Algorithm for Dynamic If-Conversion during Dynamic Optimization
Dynamic Optimization is an umbrella term that refers to any optimization of software that is performed after the initial compile time. It is a complementary optimization opportuni...
Kim M. Hazelwood, Thomas M. Conte
IEEEPACT
2000
IEEE
14 years 6 days ago
Characterization of Silent Stores
Gordon B. Bell, Kevin M. Lepak, Mikko H. Lipasti
IEEEPACT
2000
IEEE
14 years 6 days ago
Efficient Backtracking Instruction Schedulers
Santosh G. Abraham, Waleed Meleis, Ivan D. Baev