We believe that future many-core architectures should support a simple and scalable way to execute many threads that are generated by parallel programs. A good candidate to impleme...
System-level computer architecture simulations create large volumes of simulation data to explore alternative architectural solutions. Interpreting and drawing conclusions from thi...
Abstract. Memory access latency can limit microcontroller system performance. SDRAM access control policies impact latency through SDRAM device state. It is shown that execution ti...
Current generation embedded applications demand the computation engine to offer high performance similar to custom hardware circuits while preserving the flexibility of software s...
The second ACES-MB workshop brought together researchers and practitioners interested in model-based software engineering for realtime embedded systems, with a particular focus on ...
Stefan Van Baelen, Thomas Weigert, Ileana Ober, Hu...
WiDom is a previously proposed prioritized medium access control protocol for wireless channels. We present a modification to this protocol in order to improve its reliability. Th...
—We present an application of an open source platform for wireless body sensor network called DexterNet to the problem of children’s asthma. The architecture of the system cons...
Edmund Y. W. Seto, Annarita Giani, Victor Shia, Cu...
—Sensor networks have been investigated in many scenarios and a good number of protocols have been developed. With the standardization of the IEEE 802.15.4 protocol, sensor netwo...
Feng Chen, Thomas Talanis, Reinhard German, Falko ...
— Software intellectual property (SWIP) is a critical component of increasingly complex FPGA based system on chip (SOC) designs. As a result, developers want to ensure that their...
—The performance estimation of complex multi-processor systems-on-chip (MPSoC) in a reasonable amount of time and with a good accuracy becomes more and more challenging due to th...
Kai Huang, Iuliana Bacivarov, Jun Liu, Wolfgang Ha...