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MICRO
2006
IEEE
96views Hardware» more  MICRO 2006»
13 years 11 months ago
Xbox 360 System Architecture
Jeff Andrews, Nick Baker
MICRO
2006
IEEE
113views Hardware» more  MICRO 2006»
13 years 11 months ago
Exploiting Fine-Grained Data Parallelism with Chip Multiprocessors and Fast Barriers
We examine the ability of CMPs, due to their lower onchip communication latencies, to exploit data parallelism at inner-loop granularities similar to that commonly targeted by vec...
Jack Sampson, Rubén González, Jean-F...
MICRO
2006
IEEE
96views Hardware» more  MICRO 2006»
13 years 11 months ago
Molecular Caches: A caching structure for dynamic creation of application-specific Heterogeneous cache regions
CMPs enable simultaneous execution of multiple applications on the same platforms that share cache resources. Diversity in the cache access patterns of these simultaneously execut...
Keshavan Varadarajan, S. K. Nandy, Vishal Sharda, ...
MICRO
2006
IEEE
107views Hardware» more  MICRO 2006»
13 years 11 months ago
Dataflow Predication
Predication facilitates high-bandwidth fetch and large static scheduling regions, but has typically been too complex to implement comprehensively in out-of-order microarchitecture...
Aaron Smith, Ramadass Nagarajan, Karthikeyan Sanka...
MICRO
2006
IEEE
191views Hardware» more  MICRO 2006»
13 years 11 months ago
CAPSULE: Hardware-Assisted Parallel Execution of Component-Based Programs
Since processor performance scalability will now mostly be achieved through thread-level parallelism, there is a strong incentive to parallelize a broad range of applications, inc...
Pierre Palatin, Yves Lhuillier, Olivier Temam
ETS
2007
IEEE
90views Hardware» more  ETS 2007»
13 years 11 months ago
Attitudes and Satisfaction with a Hybrid Model of Counseling Supervision
Steven R. Conn, Richard L. Roberts, Barbara M. Pow...