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ASPDAC
2012
ACM
265views Hardware» more  ASPDAC 2012»
12 years 6 months ago
GLOW: A global router for low-power thermal-reliable interconnect synthesis using photonic wavelength multiplexing
In this paper, we examine the integration potential and explore the design space of low power thermal reliable on-chip interconnect synthesis featuring nanophotonics Wavelength Di...
Duo Ding, Bei Yu, David Z. Pan
ASPDAC
2012
ACM
238views Hardware» more  ASPDAC 2012»
12 years 6 months ago
Design for manufacturability and reliability for TSV-based 3D ICs
—The 3D IC integration using through-silicon-vias (TSV) has gained tremendous momentum recently for industry adoption. However, as TSV involves disruptive manufacturing technolog...
David Z. Pan, Sung Kyu Lim, Krit Athikulwongse, Mo...
ASPDAC
2012
ACM
288views Hardware» more  ASPDAC 2012»
12 years 6 months ago
Automatic timing granularity adjustment for host-compiled software simulation
—Host-compiled simulation has been widely adopted as a practical approach for fast and high-level evaluation of complex software-intensive systems at early stages of the design p...
Parisa Razaghi, Andreas Gerstlauer
ARC
2012
Springer
280views Hardware» more  ARC 2012»
12 years 6 months ago
Scalable Memory Hierarchies for Embedded Manycore Systems
As the size of FPGA devices grows following Moore’s law, it becomes possible to put a complete manycore system onto a single FPGA chip. The centralized memory hierarchy on typica...
Sen Ma, Miaoqing Huang, Eugene Cartwright, David L...
ARC
2012
Springer
256views Hardware» more  ARC 2012»
12 years 6 months ago
Table-Based Division by Small Integer Constants
Computing cores to be implemented on FPGAs may involve divisions by small integer constants in fixed or floating point. This article presents a family of architectures addressing...
Florent de Dinechin, Laurent-Stéphane Didie...
ARC
2012
Springer
317views Hardware» more  ARC 2012»
12 years 6 months ago
A High Throughput FPGA-Based Implementation of the Lanczos Method for the Symmetric Extremal Eigenvalue Problem
Iterative numerical algorithms with high memory bandwidth requirements but medium-size data sets (matrix size ∼ a few 100s) are highly appropriate for FPGA acceleration. This pap...
Abid Rafique, Nachiket Kapre, George A. Constantin...
ICCD
2011
IEEE
296views Hardware» more  ICCD 2011»
12 years 10 months ago
DPPC: Dynamic power partitioning and capping in chip multiprocessors
—A key challenge in chip multiprocessor (CMP) design is to optimize the performance within a power budget limited by the CMP’s cooling, packaging, and power supply capacities. ...
Kai Ma, Xiaorui Wang, Yefu Wang
FPL
2011
Springer
168views Hardware» more  FPL 2011»
12 years 10 months ago
Scalable Arbiters and Multiplexers for On-FGPA Interconnection Networks
Abstract—Soft on-FGPA interconnection networks are gaining increasing importance since they simplify the integration of heterogeneous components and offer, at the same time, a mo...
Giorgos Dimitrakopoulos, Christoforos Kachris, Emm...
FPL
2011
Springer
233views Hardware» more  FPL 2011»
12 years 10 months ago
Compact CLEFIA Implementation on FPGAS
In this paper two compact hardware structures for the computation of the CLEFIA encryption algorithm are presented. One structure based on the existing state of the art and a nove...
Paulo Proenca, Ricardo Chaves
FPL
2011
Springer
203views Hardware» more  FPL 2011»
12 years 10 months ago
Accelerating Fluid Registration Algorithm on Multi-FPGA Platforms
Abstract—In the clinical applications, medical image registrations on the images taken from different times and/or through different modalities are needed in order to have an obj...
Jason Cong, Muhuan Huang, Yi Zou