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ITC
1993
IEEE
85views Hardware» more  ITC 1993»
14 years 2 months ago
Structure and Metrology for an Analog Testability Bus
Kenneth P. Parker, John E. McDermid, Stig Oresjo
ITC
1993
IEEE
148views Hardware» more  ITC 1993»
14 years 2 months ago
DELTEST: Deterministic Test Generation for Gate-Delay Faults
This paper presents an efficient approach to generate tests for gate delay faults. Unlike other known algorithms which try to generate a 'good' delay test the presented ...
Udo Mahlstedt
ITC
1993
IEEE
95views Hardware» more  ITC 1993»
14 years 2 months ago
Fault Diagnosis of Flash ADC using DNL Test
This paper describes a technique which uses the Differential Non Linearity (DNL) test data for fault location and identification of the analog components of a flash ADC. In a flash...
Anchada Charoenrook, Mani Soma
ISMVL
1993
IEEE
90views Hardware» more  ISMVL 1993»
14 years 2 months ago
Current-Mode CMOS Galois Field Circuits
Use of current-mode CMOS circuitsfor implementation of multiple-valued logic (MVL)functions has been considered in a number of recent papers. In this paper, we present an applicat...
Zeljko Zilic, Zvonko G. Vranesic
ISMVL
1993
IEEE
140views Hardware» more  ISMVL 1993»
14 years 2 months ago
Systematic Construction of Natural Deduction Systems for Many-Valued Logics
A construction principle for natural deduction systems for arbitrary finitely-many-valued first order logics is exhibited. These systems are systematically obtained from sequent...
Matthias Baaz, Christian G. Fermüller, Richar...
ISCAS
1993
IEEE
83views Hardware» more  ISCAS 1993»
14 years 2 months ago
Integration of Clock Skew and Register Delays into a Retiming Algorithm
Tolga Soyata, Eby G. Friedman, James H. Mulligan J...