Sciweavers

ASPLOS
2006
ACM
14 years 1 months ago
A new idiom recognition framework for exploiting hardware-assist instructions
Motohiro Kawahito, Hideaki Komatsu, Takao Moriyama...
ASPLOS
2006
ACM
14 years 1 months ago
Geiger: monitoring the buffer cache in a virtual machine environment
Virtualization is increasingly being used to address server management and administration issues like flexible resource allocation, service isolation and workload migration. In a...
Stephen T. Jones, Andrea C. Arpaci-Dusseau, Remzi ...
ASPLOS
2006
ACM
14 years 1 months ago
Mercury and freon: temperature emulation and management for server systems
Power densities have been increasing rapidly at all levels of server systems. To counter the high temperatures resulting from these densities, systems researchers have recently st...
Taliver Heath, Ana Paula Centeno, Pradeep George, ...
ASPLOS
2006
ACM
14 years 1 months ago
Exploiting coarse-grained task, data, and pipeline parallelism in stream programs
As multicore architectures enter the mainstream, there is a pressing demand for high-level programming models that can effectively map to them. Stream programming offers an attrac...
Michael I. Gordon, William Thies, Saman P. Amarasi...
ASPLOS
2006
ACM
14 years 1 months ago
A performance counter architecture for computing accurate CPI components
Cycles per Instruction (CPI) stacks break down processor execution time into a baseline CPI plus a number of miss event CPI components. CPI breakdowns can be very helpful in gaini...
Stijn Eyerman, Lieven Eeckhout, Tejas Karkhanis, J...
ASPLOS
2006
ACM
14 years 1 months ago
A spatial path scheduling algorithm for EDGE architectures
Growing on-chip wire delays are motivating architectural features that expose on-chip communication to the compiler. EDGE architectures are one example of communication-exposed mi...
Katherine E. Coons, Xia Chen, Doug Burger, Kathryn...
ASPLOS
2006
ACM
14 years 1 months ago
Tradeoffs in transactional memory virtualization
For transactional memory (TM) to achieve widespread acceptance, transactions should not be limited to the physical resources of any specific hardware implementation. TM systems s...
JaeWoong Chung, Chi Cao Minh, Austen McDonald, Tra...
ASPLOS
2006
ACM
14 years 1 months ago
Unbounded page-based transactional memory
Exploiting thread level parallelism is paramount in the multi-core era. Transactions enable programmers to expose such parallelism by greatly simplifying the multi-threaded progra...
Weihaw Chuang, Satish Narayanasamy, Ganesh Venkate...
ASPLOS
2006
ACM
14 years 1 months ago
HeapMD: identifying heap-based bugs using anomaly detection
We present the design, implementation, and evaluation of HeapMD, a dynamic analysis tool that finds heap-based bugs using anomaly detection. HeapMD is based upon the observation ...
Trishul M. Chilimbi, Vinod Ganapathy