POPL
2010
ACM
14 years 2 months ago
2010
ACM
POPL
2010
ACM
14 years 2 months ago
2010
ACM
ion-Guided Synthesis of Synchronization Martin Vechev IBM Research Eran Yahav IBM Research Greta Yorsh IBM Research We present a novel framework for automatic inference of effici...
ASPLOS
2010
ACM
14 years 2 months ago
2010
ACM
The Local Outlier Factor (LOF) is a very powerful anomaly detection method available in machine learning and classification. The algorithm defines the notion of local outlier in...
ASPLOS
2010
ACM
14 years 2 months ago
2010
ACM
Scalable heterogeneous computing systems, which are composed of a mix of compute devices, such as commodity multicore processors, graphics processors, reconfigurable processors, ...
ASPLOS
2010
ACM
14 years 2 months ago
2010
ACM
Prior work has shown dramatic acceleration for various database operations on GPUs, but only using primitives that are not part of conventional database languages such as SQL. Thi...
ASPLOS
2010
ACM
14 years 2 months ago
2010
ACM
SIMD (Single Instruction, Multiple Data) engines are an essential part of the processors in various computing markets, from servers to the embedded domain. Although SIMD-enabled a...
ASPLOS
2010
ACM
14 years 2 months ago
2010
ACM
This paper presents a randomized scheduler for finding concurrency bugs. Like current stress-testing methods, it repeatedly runs a given test program with supplied inputs. Howeve...
ASPLOS
2010
ACM
14 years 2 months ago
2010
ACM
With the right techniques, multicore architectures may be able to continue the exponential performance trend that elevated the performance of applications of all types for decades...
ASPLOS
2010
ACM
14 years 2 months ago
2010
ACM
A large number of user requests execute (often concurrently) within a server system. A single request may exhibit fluctuating hardware characteristics (such as instruction comple...
ASPLOS
2010
ACM
14 years 2 months ago
2010
ACM
Growing transistor counts, limited power budgets, and the breakdown of voltage scaling are currently conspiring to create a utilization wall that limits the fraction of a chip tha...