CGO
2008
IEEE
14 years 6 months ago
2008
IEEE
In the embedded domain, custom hardware in the form of ASICs is often used to implement critical parts of applications when performance and energy efficiency goals cannot be met ...
CGO
2008
IEEE
14 years 6 months ago
2008
IEEE
CGO
2008
IEEE
14 years 6 months ago
2008
IEEE
Program optimization for highly-parallel systems has historically been considered an art, with experts doing much of the per
CGO
2008
IEEE
14 years 6 months ago
2008
IEEE
CGO
2008
IEEE
14 years 6 months ago
2008
IEEE
This paper describes an algorithm that takes a trace (i.e., a sequence of numbers or vectors of numbers) as input, and from that produces a sequence of loop nests that, when run, ...
CGO
2008
IEEE
14 years 6 months ago
2008
IEEE
Array inlining expands the concepts of object inlining to arrays. Groups of objects and arrays that reference each other are placed consecutively in memory so that their relative ...
CGO
2008
IEEE
14 years 6 months ago
2008
IEEE
CGO
2008
IEEE
14 years 6 months ago
2008
IEEE
The recent trend in the processor industry of packing multiple processor cores in a chip has increased the importance of automatic techniques for extracting thread level paralleli...
CGO
2008
IEEE
14 years 6 months ago
2008
IEEE
Modern compilers implement a large number of optimizations which all interact in complex ways, and which all have a different impact on code quality, compilation time, code size,...
CGO
2008
IEEE
14 years 6 months ago
2008
IEEE
Vector-thread (VT) architectures exploit multiple forms of parallelism simultaneously. This paper describes a compiler for the Scale VT architecture, which takes advantage of the ...