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ISORC
2008
IEEE
14 years 6 months ago
Interrupt Handlers in Java
An important part of implementing device drivers is to control the interrupt facilities of the hardware platform and to program interrupt handlers. Current methods for handling in...
Stephan Korsholm, Martin Schoeberl, Anders P. Ravn
ISORC
2008
IEEE
14 years 6 months ago
Structural Model of Real-Time Databases: An Illustration
A real-time database is a database in which both the data and the operations upon the data may have timing constraints. The design of this kind of database requires the introducti...
Nizar Idoudi, Claude Duvallet, Bruno Sadeg, Rafik ...
ISORC
2008
IEEE
14 years 6 months ago
Memory Management for Real-Time Java: State of the Art
The Real-time Specification for Java extends the Java platform to support real-time processing and introduces a region-based memory model, called scoped memory, which side-steps ...
Filip Pizlo, Jan Vitek
ISORC
2008
IEEE
14 years 6 months ago
Efficient Metadata Management for Flash File Systems
Jaegeuk Kim, Heeseung Jo, Hyotaek Shim, Jin-Soo Ki...
ISORC
2008
IEEE
14 years 6 months ago
Applicability of Web Service Technologies to Reach Real Time Capabilities
Currently the developing process for enterprise applications is improved by the Service Oriented Architecture (SOA) paradigms. With SOAs the creation of modular and clearly defin...
Steffen Prüter, Guido Moritz, Elmar Zeeb, Ral...
IOLTS
2008
IEEE
116views Hardware» more  IOLTS 2008»
14 years 6 months ago
SystemC-Based Minimum Intrusive Fault Injection Technique with Improved Fault Representation
In this paper, we propose a new SystemC-based fault injection technique that has improved fault representation in visible and on-the-fly data and signal registers. The technique ...
Rishad A. Shafik, Paul M. Rosinger, Bashir M. Al-H...
IOLTS
2008
IEEE
83views Hardware» more  IOLTS 2008»
14 years 6 months ago
On the Minimization of Potential Transient Errors and SER in Logic Circuits Using SPFD
Sets of Pairs of Functions to be Distinguished (SPFD) is a functional flexibility representation method that was recently introduced in the logic synthesis domain, and promises s...
Sobeeh Almukhaizim, Yiorgos Makris, Yu-Shen Yang, ...
IOLTS
2008
IEEE
102views Hardware» more  IOLTS 2008»
14 years 6 months ago
Integrating Scan Design and Soft Error Correction in Low-Power Applications
— Error correcting coding is the dominant technique to achieve acceptable soft-error rates in memory arrays. In many modern circuits, the number of memory elements in the random ...
Michael E. Imhof, Hans-Joachim Wunderlich, Christi...
IOLTS
2008
IEEE
117views Hardware» more  IOLTS 2008»
14 years 6 months ago
Verification and Analysis of Self-Checking Properties through ATPG
Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient err...
Marc Hunger, Sybille Hellebrand
IOLTS
2008
IEEE
112views Hardware» more  IOLTS 2008»
14 years 6 months ago
A Modular Memory BIST for Optimized Memory Repair
An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. Most of the existing built-in self-repair solutions reuse IP-C...
Philipp Öhler, Alberto Bosio, Giorgio Di Nata...