HIPEAC
2007
Springer
14 years 6 months ago
2007
Springer
A critical component in the design of secure processors is memory encryption which provides protection for the privacy of code and data stored in off-chip memory. The overhead of ...
HIPEAC
2007
Springer
14 years 6 months ago
2007
Springer
Caches are designed to provide the best tradeoff between access speed and capacity for a set of target applications. Unfortunately, different applications, and even different phas...
HIPEAC
2007
Springer
14 years 6 months ago
2007
Springer
Computer architects and designers rely heavily on simulation. The downside of simulation is that it is very time-consuming — simulating an industry-standard benchmark on today...
HIPEAC
2007
Springer
14 years 6 months ago
2007
Springer
Abstract. In this paper, we propose a novel approach to reduce dynamic power in set-associative caches that leverages on a leakage-saving proposal, namely Cache Decay. We thus open...
HIPEAC
2007
Springer
14 years 6 months ago
2007
Springer
HIPEAC
2007
Springer
14 years 6 months ago
2007
Springer
Abstract. The interest in translation-based virtual execution environments (VEEs) is growing with the recognition of their importance in a variety of applications. However, due to ...
HIPEAC
2007
Springer
14 years 6 months ago
2007
Springer
Abstract. Iterative optimization has become a popular technique to obtain improvements over the default settings in a compiler for performance-critical applications, such as embedd...
HIPEAC
2007
Springer
14 years 6 months ago
2007
Springer
The XScale processor family provides user-controllable independent configuration of CPU, bus, and memory frequencies. This feature introduces another handle for the code optimizat...
HIPEAC
2007
Springer
14 years 6 months ago
2007
Springer
HIPEAC
2007
Springer
14 years 6 months ago
2007
Springer
Voltage scaling reduces leakage power for cache lines unlikely to be referenced soon. Partitioning reduces dynamic power via smaller, specialized structures. We combine approaches,...