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ACSD
2010
IEEE
219views Hardware» more  ACSD 2010»
13 years 9 months ago
The Model Checking View to Clock Gating and Operand Isolation
Abstract--Clock gating and operand isolation are two techniques to reduce the power consumption in state-of-the-art hardware designs. Both approaches basically follow a two-step pr...
Jens Brandt, Klaus Schneider, Sumit Ahuja, Sandeep...
ACSD
2010
IEEE
222views Hardware» more  ACSD 2010»
13 years 9 months ago
Efficient Model Checking of PSL Safety Properties
Abstract--Safety properties are an important class of properties as in the industrial use of model checking a large majority of the properties to be checked are safety properties. ...
Tuomas Launiainen, Keijo Heljanko, Tommi A. Juntti...
ACSD
2010
IEEE
197views Hardware» more  ACSD 2010»
13 years 9 months ago
Order-Independence of Vector-Based Transition Systems
Abstract--Semantics of many specification languages, particularly those used in the domain of hardware, is described in terms of vector-based transition systems. In such a transiti...
Matthias Raffelsieper, Mohammad Reza Mousavi, Hans...
ACSD
2010
IEEE
220views Hardware» more  ACSD 2010»
13 years 9 months ago
Towards Performance Evaluation of Mobile Ad Hoc Network Protocols
We present a formal framework to evaluate stochastic properties of MANET protocols. It captures the interplay between stochastic behavior of protocols deployed at different network...
Fatemeh Ghassemi, Ali Movaghar, Wan Fokkink
ACSD
2010
IEEE
215views Hardware» more  ACSD 2010»
13 years 9 months ago
A Formal Semantics of Clock Refinement in Imperative Synchronous Languages
The synchronous model of computation divides the execution of a program into an infinite sequence of socalled macro steps, which are further divided into finitely many micro steps....
Mike Gemunde, Jens Brandt, Klaus Schneider
ACSD
2010
IEEE
224views Hardware» more  ACSD 2010»
13 years 9 months ago
Robustness of Sequential Circuits
Digital components play a central role in the design of complex embedded systems. These components are interconnected with other, possibly analog, devices and the physical environm...
Laurent Doyen, Thomas A. Henzinger, Axel Legay, De...
ACSD
2010
IEEE
224views Hardware» more  ACSD 2010»
13 years 9 months ago
STG Decomposition: Internal Communication for SI Implementability
Dominic Wist, Mark Schäfer, Walter Vogler, Ra...
ACSD
2010
IEEE
239views Hardware» more  ACSD 2010»
13 years 9 months ago
A Complete Synthesis Method for Block-Level Relaxation in Self-Timed Datapaths
Self-timed circuits present an attractive solution to the problem of process variation. However, implementing selftimed combinational logic can be complex and expensive. This pape...
W. B. Toms, David A. Edwards
ACSD
2010
IEEE
255views Hardware» more  ACSD 2010»
13 years 9 months ago
From POOSL to UPPAAL: Transformation and Quantitative Analysis
POOSL (Parallel Object-Oriented Specification Language) is a powerful general purpose system-level modeling language. In research on design space exploration of motion control syst...
Jiansheng Xing, Bart D. Theelen, Rom Langerak, Jac...
ACSD
2010
IEEE
216views Hardware» more  ACSD 2010»
13 years 9 months ago
A Linear Process-Algebraic Format for Probabilistic Systems with Data
Joost-Pieter Katoen, Jaco van de Pol, Mariëll...