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35
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DATE
2009
IEEE
168
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DATE 2009
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Selective state retention design using symbolic simulation
14 years 7 months ago
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Abstract—Addressing both standby and active power is a major challenge in developing System-on-Chip designs for batterypowered products. Powering off sections of logic or memorie...
Ashish Darbari, Bashir M. Al-Hashimi, David Flynn,...
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