The floating-point unit of a S/390 CMOS microprocessor is described. It contains a 116 bit fraction dataflow for addition and subtraction and a 64 bit-wide multiplier. Besides the...
In modern computers, the floating point unit is the part of the processor delivering the highest computing power and getting most attention from the design team. Performance of an...
This paper describes a study of a class of algorithms for the floating-point divide and square root operations, based on the Newton-Raphson iterative method. The two main goals we...
Marius A. Cornea-Hasegan, Roger A. Golliver, Peter...
This paper describes the application of high radix redundant CORDIC algorithms to complex logarithmic number system arithmetic. It shows that a CLNS addition can be performed with...
This note presents necessary and sufficient conditions for parallel and constant time conversions from one digit-set into another, and thus also for constant time addition. In the...
It is widely recognized that security issues will play a crucial role in the majority of future computer and communication systems. Central tools for achieving system security are...
A new IEEE compliant floating-point rounding algorithm for computing the rounded product from a carry-save representation of the product is presented. The new rounding algorithm i...
The design and implementation of a double precision floating-point IEEE-754 standard adder is described which uses "flagged prefix addition" to merge rounding with the s...
Andrew Beaumont-Smith, Neil Burgess, S. Lefrere, C...