ARITH
2009
IEEE
14 years 6 months ago
2009
IEEE
The design of a component to perform parallel addition of multiple floating-point (FP) operands is explored in this work. In particular, a 3-input FP adder is discussed in more d...
ARITH
2009
IEEE
14 years 6 months ago
2009
IEEE
Despite the impressive progress of logic synthesis in the past decade, finding the best architecture for a given circuit still remains an open and largely unsolved problem, espec...
ARITH
2009
IEEE
14 years 6 months ago
2009
IEEE
Moduli of the form 2n ± 1, which greatly simplify certain arithmetic operations in residue number systems (RNS), have been of longstanding interest. A steady stream of designs fo...
ARITH
2009
IEEE
14 years 6 months ago
2009
IEEE
Interest in decimal arithmetic increased considerably in recent years. This paper presents new designs for decimal floating point (DFP) addition, multiplication, fused multiplyad...
ARITH
2009
IEEE
14 years 6 months ago
2009
IEEE
ARITH
2009
IEEE
14 years 6 months ago
2009
IEEE
A method for polynomial multiplication over finite fields using field extensions and polynomial interpolation is introduced. The proposed method uses polynomial interpolation a...