Sciweavers

TVLSI
2010
13 years 6 months ago
Improving Multi-Level NAND Flash Memory Storage Reliability Using Concatenated BCH-TCM Coding
By storing more than one bit in each memory cell, multi-level per cell (MLC) NAND flash memories are dominating global flash memory market due to their appealing storage density ad...
Shu Li, Tong Zhang
TVLSI
2010
13 years 6 months ago
Architectural Enhancement and System Software Support for Program Code Integrity Monitoring in Application-Specific Instruction-
Program code in a computer system can be altered either by malicious security attacks or by various faults in microprocessors. At the instruction level, all code modifications are ...
Hai Lin, Yunsi Fei, Xuan Guan, Zhijie Jerry Shi
TVLSI
2010
13 years 6 months ago
Variation-Aware System-Level Power Analysis
Abstract-- The operational characteristics of integrated circuits based on nanoscale semiconductor technology are expected to be increasingly affected by variations in the manufact...
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan...
TVLSI
2010
13 years 6 months ago
Computation Error Analysis in Digital Signal Processing Systems With Overscaled Supply Voltage
It has been recently demonstrated that digital signal processing systems may possibly leverage unconventional voltage overscaling (VOS) to reduce energy consumption while maintaini...
Yang Liu, Tong Zhang, Keshab K. Parhi
TVLSI
2010
13 years 6 months ago
A Low-Power DSP for Wireless Communications
This paper proposes a low-power high-throughput digital signal processor (DSP) for baseband processing in wireless terminals. It builds on our earlier architecture--Signal processi...
Hyunseok Lee, Chaitali Chakrabarti, Trevor N. Mudg...
TVLSI
2010
13 years 6 months ago
A Reverse-Encoding-Based On-Chip Bus Tracer for Efficient Circular-Buffer Utilization
Hardware debuggers and logic analyzers must be able to record a continuous trace of data. Since the trace data are tremendous, to save space, these traces are often compressed. The...
Fu-Ching Yang, Cheng-Lung Chiang, Ing-Jer Huang
TVLSI
2010
13 years 6 months ago
Asynchronous Current Mode Serial Communication
Abstract--An asynchronous high-speed wave-pipelined bit-serial link for on-chip communication is presented as an alternative to standard bit-parallel links. The link employs the di...
Rostislav (Reuven) Dobkin, Michael Moyal, Avinoam ...
TVLSI
2010
13 years 6 months ago
Exploration of Heterogeneous FPGAs for Mapping Linear Projection Designs
In many applications, a reduction of the amount of the original data or a representation of the original data by a small set of variables is often required. Among many techniques, ...
Christos-Savvas Bouganis, Iosifina Pournara, Peter...
TVLSI
2010
13 years 6 months ago
A Novel Variation-Tolerant Keeper Architecture for High-Performance Low-Power Wide Fan-In Dynamic or Gates
Dynamic gates have been excellent choice in the design of high-performance modules in modern microprocessors. The only limitation of dynamic gates is their relatively low noise mar...
Hamed F. Dadgour, Kaustav Banerjee
TVLSI
2010
13 years 6 months ago
Dynamic and Leakage Energy Minimization With Soft Real-Time Loop Scheduling and Voltage Assignment
With the shrinking of technology feature sizes, the share of leakage in total power consumption of digital systems continues to grow. Traditional dynamic voltage scaling (DVS) fail...
Meikang Qiu, Laurence Tianruo Yang, Zili Shao, Edw...