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ASYNC
1997
IEEE
140views Hardware» more  ASYNC 1997»
14 years 3 months ago
The Design and Verification of A High-Performance Low-Control-Overhead Asynchronous Differential Equation Solver
Abstract-This paper describes the design and verification of a high-performance asynchronous differential equation solver benchmark circuit. The design has low control overhead whi...
Kenneth Y. Yun, Ayoob E. Dooply, Julio Arceo, Pete...
ASYNC
1997
IEEE
83views Hardware» more  ASYNC 1997»
14 years 3 months ago
Response Time Properties of Some Asynchronous Circuits
Wediscuss response timeproperties of linear arrays and tree-like arrays of cells with various handshake communication behaviours. The response times of a networkare the delays bet...
Jo C. Ebergen, Robert Berks
ASYNC
1997
IEEE
103views Hardware» more  ASYNC 1997»
14 years 3 months ago
Efficient Timing Analysis Algorithms for Timed State Space Exploration
This paper presents new timing analysis algorithms for efficient state space exploration during timed circuit synthesis. Timed circuits are a class of asynchronous circuits that i...
Wendy Belluomini, Chris J. Myers
ASYNC
1997
IEEE
95views Hardware» more  ASYNC 1997»
14 years 3 months ago
Partial order based approach to synthesis of speed-independent circuits
This paper introduces a novel technique for synthesis of speed-independent circuits from their Signal Transition Graph specifications. The new method uses partial order in the fo...
Alexei L. Semenov, Alexandre Yakovlev, Enric Pasto...
ASYNC
1997
IEEE
66views Hardware» more  ASYNC 1997»
14 years 3 months ago
Speculative Completion for the Design of High-Performance Asynchronous Dynamic Adders
This paper presents an in-depth case study in highperformance asynchronous adder design. A recent method, called “speculative completion”, is used. This method uses single-rai...
Steven M. Nowick, Kenneth Y. Yun, Ayoob E. Dooply,...
ASYNC
1997
IEEE
85views Hardware» more  ASYNC 1997»
14 years 3 months ago
A FIFO Ring Performance Experiment
Charles E. Molnar, Ian W. Jones, William S. Coates...
ASYNC
1997
IEEE
123views Hardware» more  ASYNC 1997»
14 years 3 months ago
On the Realisation of Delay-Insensitive Asynchronous Circuits with CMOS Ternary Logic
The realisation of Delay-Insensitive (DI) asynchronous circuits with a CMOS ternary logic is described in this paper. The main advantage of temary logic is the easy realisation of...
Riccardo Mariani, Roberto Roncella, Roberto Salett...
ASYNC
1997
IEEE
67views Hardware» more  ASYNC 1997»
14 years 3 months ago
Technology Mapping for Speed-Independent Circuits: Decomposition and Resynthesis
Alex Kondratyev, Michael Kishinevsky, Jordi Cortad...
ASYNC
1997
IEEE
104views Hardware» more  ASYNC 1997»
14 years 3 months ago
AMULET2e: An Asynchronous Embedded Controller
Stephen B. Furber, Jim D. Garside, Steve Temple, J...