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27
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ASYNC
2007
IEEE
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ASYNC 2007
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High Rate Wave-pipelined Asynchronous On-chip Bit-serial Data Link
14 years 5 months ago
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www.technion.ac.il
A high data rate asynchronous bit-serial link for long-range on-chip communication is presented. The data bit cycle time is equal to a single gate delay, enabling 67Gbps throughpu...
Rostislav (Reuven) Dobkin, Yevgeny Perelman, Tuvia...
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