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ATS
1997
IEEE
88views Hardware» more  ATS 1997»
14 years 3 months ago
On the Adders with Minimum Tests
This paper considers two types of n-bit adders, ripple carry adders and cascaded carry look-ahead adders, with minimum tests for stuck-at fault models. In the first part, we prese...
Seiji Kajihara, Tsutomu Sasao
ATS
1997
IEEE
90views Hardware» more  ATS 1997»
14 years 3 months ago
Exploiting Logic Simulation to Improve Simulation-based Sequential ATPG
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo,...
ATS
1997
IEEE
87views Hardware» more  ATS 1997»
14 years 3 months ago
A Genetic Algorithm for the Computation of Initialization Sequences for Synchronous Sequential Circuits
Testing circuits which do not include a global reset signal requires either complex ATPG algorithms based on 9- or even 256-valued algebras, or some suitable method to generate in...
Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo,...
ATS
1997
IEEE
89views Hardware» more  ATS 1997»
14 years 3 months ago
Guaranteeing Testability in Re-encoding for Low Power
This paper considers the testability implications of low power design methodologies. Low power and high testability are shown to be highly contrasting requirements, and an optimiz...
Silvia Chiusano, Fulvio Corno, Paolo Prinetto, Mau...
ATS
1997
IEEE
95views Hardware» more  ATS 1997»
14 years 3 months ago
Analysis of the Feasibility of Dynamic Thermal Testing in Digital Circuits
Josep Altet, Antonio Rubio, Hideo Tamamoto