ISMVL
2006
IEEE
14 years 6 months ago
2006
IEEE
Abstract— This paper presents a novel voltage mode Balanced Ternary Adder (BTA), implemented with Recharged SemiFloating Gate Devices. By using balanced ternary notation, it poss...
ISMVL
2007
IEEE
14 years 7 months ago
2007
IEEE
This paper presents ternary counters using balanced ternary notation. The balanced ternary counters can replace binary full adders or counters in fast adder structures. The circui...