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    ICCAD
    2008
    IEEE
    108views Hardware» more  ICCAD 2008»
    FBT: filled buffer technique to reduce code size for VLIW processors
    14 years 8 months ago
    FBT: filled buffer technique to reduce code size for VLIW processors
    Download  www.cecs.uci.edu
    — VLIW processors provide higher performance and better efficiency etc. than RISC processors in specific domains like multimedia applications etc. A disadvantage is the bloated...
    Talal Bonny, Jörg Henkel
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