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    DAC
    2008
    ACM
    146views Computer Architecture» more  DAC 2008»
    Miss reduction in embedded processors through dynamic, power-friendly cache design
    15 years 1 months ago
    Miss reduction in embedded processors through dynamic, power-friendly cache design
    Download  cseart.ucsd.edu
    Today, embedded processors are expected to be able to run complex, algorithm-heavy applications that were originally designed and coded for general-purpose processors. As a result...
    Garo Bournoutian, Alex Orailoglu
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