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ISLPED
1996
ACM
72views Hardware» more  ISLPED 1996»
14 years 4 months ago
Simultaneous buffer and wire sizing for performance and power optimization
In this paper, we study the simultaneous buffer and wire sizing (SBWS) problem for delay and power dissipation minimization. We prove the BS/WS relation for optimal SBWS solutions...
Jason Cong, Cheng-Kok Koh, Kwok-Shing Leung