Sciweavers

CODES
2010
IEEE
13 years 9 months ago
Hardware/software optimization of error detection implementation for real-time embedded systems
This paper presents an approach to system-level optimization of error detection implementation in the context of fault-tolerant realtime distributed embedded systems used for safe...
Adrian Lifa, Petru Eles, Zebo Peng, Viacheslav Izo...
CODES
2010
IEEE
13 years 10 months ago
Accurate online power estimation and automatic battery behavior based power model generation for smartphones
This paper describes PowerBooter, an automated power model construction technique that uses built-in battery voltage sensors and knowledge of battery discharge behavior to monitor...
Lide Zhang, Birjodh Tiwana, Zhiyun Qian, Zhaoguang...
CODES
2010
IEEE
13 years 10 months ago
Automatic memory partitioning: increasing memory parallelism via data structure partitioning
In high-level synthesis, pipelined designs are often restricted by the number of memory banks available to the synthesis system. Using multiple memory banks can improve the perfor...
Yosi Ben-Asher, Nadav Rotem
CODES
2010
IEEE
13 years 10 months ago
A greedy buffer allocation algorithm for power-aware communication in body sensor networks
Monitoring human movements using wireless sensory devices promises to revolutionize the delivery of healthcare services. In spite of their potentials for many application domains,...
Hassan Ghasemzadeh, Roozbeh Jafari
CODES
2010
IEEE
13 years 10 months ago
A task remapping technique for reliable multi-core embedded systems
With the continuous scaling of semiconductor technology, the life-time of circuit is decreasing so that processor failure becomes an important issue in MPSoC design. A software so...
Chanhee Lee, Hokeun Kim, Hae-woo Park, Sungchan Ki...
CODES
2010
IEEE
13 years 10 months ago
Dynamic, non-linear cache architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, algorithm-heavy, memory-intensive applications that were originally designed and coded for generalpurpos...
Garo Bournoutian, Alex Orailoglu
CODES
2010
IEEE
13 years 10 months ago
Worst-case performance analysis of synchronous dataflow scenarios
Synchronous Dataflow (SDF) is a powerful analysis tool for regular, cyclic, parallel task graphs. The behaviour of SDF graphs however is static and therefore not always able to ac...
Marc Geilen, Sander Stuijk
CODES
2010
IEEE
13 years 10 months ago
Statistical approach in a system level methodology to deal with process variation
The impact of process variation in state of the art technology makes traditional (worst case) designs unnecessarily pessimistic, which translates to suboptimal designs in terms of...
Concepción Sanz Pineda, Manuel Prieto, Jos&...
CODES
2010
IEEE
13 years 10 months ago
Exploring models of computation with ptolemy II
The Ptolemy project studies modeling, simulation, and design of concurrent, real-time, embedded systems. The focus is on assembly of concurrent components. The key underlying prin...
Christopher X. Brooks, Edward A. Lee, Stavros Trip...
CODES
2010
IEEE
13 years 10 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik