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    DAC
    2011
    ACM
    250views Computer Architecture» more  DAC 2011»
    Thermal-aware cell and through-silicon-via co-placement for 3D ICs
    13 years 7 days ago
    Thermal-aware cell and through-silicon-via co-placement for 3D ICs
    Download  cadlab.cs.ucla.edu
    Existing thermal-aware 3D placement methods assume that the temperature of 3D ICs can be optimized by properly distributing the power dissipations, and ignoring the heat conductiv...
    Jason Cong, Guojie Luo, Yiyu Shi
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