This paper presents a direct performance-driven placement algorithm for analog integrated circuits. The performance specications directly drive the layout tools without intermedi...
Koen Lampaert, Georges G. E. Gielen, Willy M. C. S...
—DARWIN is a tool that is able to synthesize CMOS opamps, on the basis of a genetic algorithm. A randomly generated initial set of opamps evolves to a set in which the topologies...
—Embedded computer systems are characterized by the presence of a processor running application-specific dedicated software. A large number of these systems must satisfy real-ti...
Abstract - In this paper we present an approach to incorporate design schedule management services into a flow management system. The basis of our approach is to derive a design s...
Our goal is to transform a low-level circuit design into a more representation. A pre-existing tool, Tranalyze [4], takes a switch-level circuit and generates a functionally equiv...
We study the minimum-costbounded-skewrouting tree (BST) problem under the linear delay model. This problem captures several engineering tradeoffs in the design of routing topologi...
Dennis J.-H. Huang, Andrew B. Kahng, Chung-Wen Alb...
The Elmore delay is an extremely popular delay metric, particularly for RC tree analysis. The widespread usage of this metric is mainly attributable to it being the most accurate ...
Abstract—We present a new approach to event-driven simulation that does not use a centralized run-time event queue, yet is capable of handling arbitrary models, including those w...
Robert S. French, Monica S. Lam, Jeremy R. Levitt,...