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DAC
2004
ACM
14 years 27 days ago
Correct-by-construction layout-centric retargeting of large analog designs
Aggressive design cycles in the semiconductor industry demand a design-reuse principle for analog circuits. The strong impact of layout intricacies on analog circuit performance n...
Sambuddha Bhattacharya, Nuttorn Jangkrajarng, Roy ...
DAC
2004
ACM
14 years 27 days ago
Industrial experience with test generation languages for processor verification
Michael L. Behm, John M. Ludden, Yossi Lichtenstei...
DAC
2004
ACM
14 years 27 days ago
Fast and accurate parasitic capacitance models for layout-aware
Considering layout effects early in the analog design process is becoming increasingly important. We propose techniques for estimating parasitic capacitances based on look-up tabl...
Anuradha Agarwal, Hemanth Sampath, Veena Yelamanch...
VLSID
2005
IEEE
120views VLSI» more  VLSID 2005»
14 years 1 months ago
On Finding Consecutive Test Vectors in a Random Sequence for Energy-Aware BIST Design
During pseudorandom testing, a significant amount of energy and test application time is wasted for generating and for applying “useless” test vectors that do not contribute t...
Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattachar...
VLSID
2005
IEEE
170views VLSI» more  VLSID 2005»
14 years 1 months ago
A High-Efficiency, Dual-Mode, Dynamic, Buck-Boost Power Supply IC for Portable Applications
Abstract—Integrated power supplies are critical building blocks in stateof-the-art portable applications, where they efficiently and accurately transform a battery supply into va...
Biranchinath Sahu, Gabriel A. Rincón-Mora
VLSID
2005
IEEE
106views VLSI» more  VLSID 2005»
14 years 1 months ago
Moore's Law is Unconstitutional
Walden C. Rhines
VLSID
2005
IEEE
105views VLSI» more  VLSID 2005»
14 years 1 months ago
Placement and Routing for 3D-FPGAs Using Reinforcement Learning and Support Vector Machines
The primary advantage of using 3D-FPGA over 2D-FPGA is that the vertical stacking of active layers reduce the Manhattan distance between the components in 3D-FPGA than when placed...
R. Manimegalai, E. Siva Soumya, V. Muralidharan, B...
VLSID
2005
IEEE
114views VLSI» more  VLSID 2005»
14 years 1 months ago
Lithography Driven Layout Design
Manish Garg, Laurent Le Cam, Matthieu Gonzalez