DATE
2007
IEEE
14 years 5 months ago
2007
IEEE
Loop unrolling is a well-known compiler optimization that can lead to significant performance improvements. When used in High Level Synthesis (HLS) unrolling can affect the contr...
DAC
2006
ACM
15 years 13 days ago
2006
ACM
We address the problem of estimating controller delay from high-level specifications during behavioral synthesis. Typically, the critical path of a synthesised behavioral design g...