The use of a centralised planning scheduler in fieldbus-based systems requiring real-time operation has proved to be a good compromise between operational flexibility and timeline...
One of the pillars of trust-worthy computing is process isolation, the ability to keep process data private from other processes running on the same device. While embedded operati...
Herwin Chan, Patrick Schaumont, Ingrid Verbauwhede
The complexity exhibited by pervasive systems is constantly increasing. Customer electronics devices provide day to day a larger amount of functionalities. A common approach for g...
Arnaud Lagger, Andres Upegui, Eduardo Sanchez, Iva...
Reconfigurable System-on-Chip (SoC) platforms that incorporate hard-core processors surrounded by large amounts of FPGA are today commodities: the reconfigurable logic is often us...
We design and implement a cryptographic biometric authentication system using a microcoded architecture. The secure properties of the biometric matching process are obtained by me...
Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhe...
In this paper, we show a novel approach to accelerate loops by tightly coupling a coprocessor to an ASIP. Latency hiding is used to exploit the parallelism available in this archi...
This paper presents the hardware architecture of DynaCORE, a dynamically reconfigurable system-on-chip for network applications. DynaCORE is an application specific coprocessor ...
Roman Koch, Thilo Pionteck, Carsten Albrecht, Erik...