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    CSREAESA
    2006
    105views Embedded Systems» more  CSREAESA 2006»
    Java Flowpaths: Efficiently Generating Circuits for Embedded Systems from Java
    14 years 25 days ago
    Java Flowpaths: Efficiently Generating Circuits for Embedded Systems from Java
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    The performance of software executed on a microprocessor is adversely affected by the basic fetchexecute cycle. A further performance penalty results from the load-execute-store p...
    Darrin M. Hanna, Michael DuChene, Girma S. Tewolde...
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    CSREAESA
    2006
    101views Embedded Systems» more  CSREAESA 2006»
    Reliable Management Services for COTS-based Space Systems and Applications
    14 years 25 days ago
    Reliable Management Services for COTS-based Space Systems and Applications
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    Hybrid spacecraft processing platforms that combine radiation-hardened components with commercialgrade COTS components have the potential to dramatically improve performance while ...
    Ian A. Troxel, Eric Grobelny, Grzegorz Cieslewski,...
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    CSREAESA
    2006
    109views Embedded Systems» more  CSREAESA 2006»
    Delay-Reduced Combinational Logic Synthesis using Multiplexers
    14 years 25 days ago
    Delay-Reduced Combinational Logic Synthesis using Multiplexers
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    - This paper presents an approach to obtain reduced hardware and/or delay for synthesizing logic functions using multiplexers. Replication of single control line multiplexer is use...
    Rekha K. James, T. K. Shahana, K. Poulose Jacob, S...
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    CSREAESA
    2006
    117views Embedded Systems» more  CSREAESA 2006»
    A Retargetable Compiler of VLIW ASIP for Media Signal Processing
    14 years 25 days ago
    A Retargetable Compiler of VLIW ASIP for Media Signal Processing
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    Zhou Zhixiong, Yang Xu, He Hu 0002, Yihe Sun
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    CSREAESA
    2006
    149views Embedded Systems» more  CSREAESA 2006»
    Generalized Deterministic Task Scheduling Algorithm for Embedded Real-Time Operating Systems
    14 years 25 days ago
    Generalized Deterministic Task Scheduling Algorithm for Embedded Real-Time Operating Systems
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    - In recent years, there has been a rapid and wide spread proliferation of non-traditional embedded computing platforms such as digital camcorders, cellular phones, and portable me...
    Myoung-Jo Jung, Moon-Haeng Cho, Yong-Hee Kim, Cheo...
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    CSREAESA
    2006
    167views Embedded Systems» more  CSREAESA 2006»
    Integration of an Analysis Tool for Large-Scale Embedded Real-Time Software into a Vehicle Control Platform Development Tool Cha
    14 years 25 days ago
    Integration of an Analysis Tool for Large-Scale Embedded Real-Time Software into a Vehicle Control Platform Development Tool Cha
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    - We present a software tool for high-level design and analysis of large-scale embedded real-time software, which has been integrated into a vehicle control platform development to...
    Xiaofeng Yin, Daniel L. Kiskis, Daniel Mihalik, Ka...
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    CSREAESA
    2006
    154views Embedded Systems» more  CSREAESA 2006»
    An Architecture for Fail-Silent Operation of FPGAs and Configurable SoCs
    14 years 25 days ago
    An Architecture for Fail-Silent Operation of FPGAs and Configurable SoCs
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    Lee Lerner, Charles E. Stroud
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    CSREAESA
    2006
    130views Embedded Systems» more  CSREAESA 2006»
    Embedded Processor Based Built-In Self-Test and Diagnosis of Logic and Memory Resources in FPGAs
    14 years 25 days ago
    Embedded Processor Based Built-In Self-Test and Diagnosis of Logic and Memory Resources in FPGAs
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    Abstract
    Daniel T. Milton, Sachin Dhingra, Charles E. Strou...
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    CSREAESA
    2006
    113views Embedded Systems» more  CSREAESA 2006»
    Power Optimization of Interconnection Networks for Transport Triggered Architecture
    14 years 25 days ago
    Power Optimization of Interconnection Networks for Transport Triggered Architecture
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    Transport triggered architecture (TTA) has been shown to provide an efficient way to design application specific instruction set processors. However, the interconnection network of...
    Xue-mi Zhao, Zhiying Wang
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    CSREAESA
    2006
    110views Embedded Systems» more  CSREAESA 2006»
    A Dual-core Embedded System-on-Chip Architecture for Multimedia Signal Processing Applications
    14 years 25 days ago
    A Dual-core Embedded System-on-Chip Architecture for Multimedia Signal Processing Applications
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    - This paper presents a dual-core embedded System-on-Chip for a wide range of application fields with particularly high processing demands, including general signal processing, vid...
    Hong Yue, Kui Dai, Zhiying Wang
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