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    DAC
    2003
    ACM
    129views Computer Architecture» more  DAC 2003»
    Using a formal specification and a model checker to monitor and direct simulation
    15 years 1 months ago
    Using a formal specification and a model checker to monitor and direct simulation
    Download  network.ku.edu.tr
    We describe a technique for verifying that a hardware design correctly implements a protocol-level formal specification. Simulation steps are translated to protocol state transiti...
    Serdar Tasiran, Yuan Yu, Brannon Batson
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    DAC
    2003
    ACM
    133views Computer Architecture» more  DAC 2003»
    Partial task assignment of task graphs under heterogeneous resource constraints
    15 years 1 months ago
    Partial task assignment of task graphs under heterogeneous resource constraints
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    This paper presents a novel partial assignment technique (PAT) that decides which tasks should be assigned to the same resource without explicitly defining assignment of these tas...
    Radoslaw Szymanek, Krzysztof Kuchcinski
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    DAC
    2003
    ACM
    128views Computer Architecture» more  DAC 2003»
    Power grid reduction based on algebraic multigrid principles
    15 years 1 months ago
    Power grid reduction based on algebraic multigrid principles
    Download  www.research.ibm.com
    With the scaling of technology, power grid noise is becoming increasingly significant for circuit performance. A typical power grid circuit contains millions of linear elements, m...
    Haihua Su, Emrah Acar, Sani R. Nassif
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    DAC
    2003
    ACM
    148views Computer Architecture» more  DAC 2003»
    Dynamic hardware/software partitioning: a first approach
    15 years 1 months ago
    Dynamic hardware/software partitioning: a first approach
    Download  www.cs.ucr.edu
    Partitioning an application among software running on a microprocessor and hardware co-processors in on-chip configurable logic has been shown to improve performance and energy co...
    Greg Stitt, Roman L. Lysecky, Frank Vahid
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    DAC
    2003
    ACM
    156views Computer Architecture» more  DAC 2003»
    Using estimates from behavioral synthesis tools in compiler-directed design space exploration
    15 years 1 months ago
    Using estimates from behavioral synthesis tools in compiler-directed design space exploration
    Download  www.isi.edu
    This paper considers the role of performance and area estimates from behavioral synthesis in design space exploration. We have developed a compilation system that automatically ma...
    Byoungro So, Pedro C. Diniz, Mary W. Hall
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    DAC
    2003
    ACM
    173views Computer Architecture» more  DAC 2003»
    An O(nlogn) time algorithm for optimal buffer insertion
    15 years 1 months ago
    An O(nlogn) time algorithm for optimal buffer insertion
    Download  dropzone.tamu.edu
    The classic algorithm for optimal buffer insertion due to van Ginneken has time and space complexity O(n2 ), where n is the number of possible buffer positions. We present a new a...
    Weiping Shi, Zhuo Li
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    DAC
    2003
    ACM
    145views Computer Architecture» more  DAC 2003»
    A hybrid SAT-based decision procedure for separation logic with uninterpreted functions
    15 years 1 months ago
    A hybrid SAT-based decision procedure for separation logic with uninterpreted functions
    Download  www.cs.cmu.edu
    SAT-based decision procedures for quantifier-free fragments of firstorder logic have proved to be useful in formal verification. These decision procedures are either based on enco...
    Sanjit A. Seshia, Shuvendu K. Lahiri, Randal E. Br...
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    DAC
    2003
    ACM
    157views Computer Architecture» more  DAC 2003»
    A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference
    15 years 1 months ago
    A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference
    Download  www.eecs.umich.edu
    In this work, we report on an unprecedented design where digital, analog, and MEMS technologies are combined to realize a generalpurpose single-chip CMOS microsystem. The converge...
    Robert M. Senger, Eric D. Marsman, Michael S. McCo...
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    DAC
    2003
    ACM
    137views Computer Architecture» more  DAC 2003»
    Test cost reduction for SOCs using virtual TAMs and lagrange multipliers
    15 years 1 months ago
    Test cost reduction for SOCs using virtual TAMs and lagrange multipliers
    Download  people.ee.duke.edu
    Recent advances in tester technology have led to automatic test equipment (ATE) that can operate at up to several hundred MHz. However, system-on-chip (SOC) scan chains typically ...
    Anuja Sehgal, Vikram Iyengar, Mark D. Krasniewski,...
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    DAC
    2003
    ACM
    146views Computer Architecture» more  DAC 2003»
    Architecture-level performance evaluation of component-based embedded systems
    15 years 1 months ago
    Architecture-level performance evaluation of component-based embedded systems
    Download  users.ece.utexas.edu
    Jeffry T. Russell, Margarida F. Jacome
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