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    DAC
    2000
    ACM
    118views Computer Architecture» more  DAC 2000»
    Improved fault diagnosis in scan-based BIST via superposition
    14 years 9 months ago
    Improved fault diagnosis in scan-based BIST via superposition
    Download  cseweb.ucsd.edu
    Ismet Bayraktaroglu, Alex Orailoglu
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    DAC
    2000
    ACM
    150views Computer Architecture» more  DAC 2000»
    Self-test methodology for at-speed test of crosstalk in chip interconnects
    14 years 9 months ago
    Self-test methodology for at-speed test of crosstalk in chip interconnects
    Download  esdat.ucsd.edu
    The effect of crosstalk errors is most significant in highperformance circuits, mandating at-speed testing for crosstalk defects. This paper describes a self-test methodology that...
    Xiaoliang Bai, Sujit Dey, Janusz Rajski
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    DAC
    2000
    ACM
    105views Computer Architecture» more  DAC 2000»
    Formal verification of iterative algorithms in microprocessors
    14 years 9 months ago
    Formal verification of iterative algorithms in microprocessors
    Download  verify.stanford.edu
    Contemporary microprocessors implement many iterative algorithms. For example, the front-end of a microprocessor repeatedly fetches and decodes instructions while updating interna...
    Mark Aagaard, Robert B. Jones, Roope Kaivola, Kath...
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    DAC
    1999
    ACM
    146views Computer Architecture» more  DAC 1999»
    Design Strategy of On-Chip Inductors for Highly Integrated RF Systems
    14 years 9 months ago
    Design Strategy of On-Chip Inductors for Highly Integrated RF Systems
    Download  marco.stanford.edu
    C. Patrick Yue, S. Simon Wong
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    DAC
    1999
    ACM
    130views Computer Architecture» more  DAC 1999»
    Soft Scheduling in High Level Synthesis
    14 years 9 months ago
    Soft Scheduling in High Level Synthesis
    Download  www.eecg.toronto.edu
    In this paper, we establish a theoretical framework for a new concept of scheduling called soft scheduling. In contrasts to the traditional schedulers referred as hard schedulers,...
    Jianwen Zhu, Daniel Gajski
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    DAC
    1999
    ACM
    112views Computer Architecture» more  DAC 1999»
    Simultaneous Routing and Buffer Insertion with Restrictions on Buffer Locations
    14 years 9 months ago
    Simultaneous Routing and Buffer Insertion with Restrictions on Buffer Locations
    Download  www.ece.northwestern.edu
    Hai Zhou, D. F. Wong, I-Min Liu, Adnan Aziz
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    DAC
    1999
    ACM
    119views Computer Architecture» more  DAC 1999»
    Gate-Level Design Exploiting Dual Supply Voltages for Power-Driven Applications
    14 years 9 months ago
    Gate-Level Design Exploiting Dual Supply Voltages for Power-Driven Applications
    Download  cad63.cs.nthu.edu.tw
    The advent of portable and high-density devices has made power consumption a critical design concern. In this paper, we address the problem of reducing power consumption via gate-...
    Ching-Wei Yeh, Min-Cheng Chang, Shih-Chieh Chang, ...
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    DAC
    1999
    ACM
    127views Computer Architecture» more  DAC 1999»
    Functional Timing Analysis for IP Characterization
    14 years 9 months ago
    Functional Timing Analysis for IP Characterization
    Download  www.eecs.umich.edu
    Hakan Yalcin, Mohammad Mortazavi, Robert Palermo, ...
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    DAC
    1999
    ACM
    134views Computer Architecture» more  DAC 1999»
    Global Multimedia System Design Exploration Using Accurate Memory Organization Feedback
    14 years 9 months ago
    Global Multimedia System Design Exploration Using Accurate Memory Organization Feedback
    Download  www.cs.ucr.edu
    Arnout Vandecappelle, Miguel Miranda, Erik Brockme...
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    DAC
    1999
    ACM
    124views Computer Architecture» more  DAC 1999»
    Improving the Test Quality for Scan-Based BIST Using a General Test Application Scheme
    14 years 9 months ago
    Improving the Test Quality for Scan-Based BIST Using a General Test Application Scheme
    Download  cadlab.ece.ucsb.edu
    Huan-Chih Tsai, Kwang-Ting Cheng, Sudipta Bhawmik
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