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ESCIENCE
2007
IEEE
14 years 5 months ago
Performance Evaluation of Scheduling Policies for Volunteer Computing
BOINC, a middleware system for volunteer computing, allows hosts to be attached to multiple projects. Each host periodically requests jobs from project servers and executes the jo...
Derrick Kondo, David P. Anderson, John McLeod
ESCIENCE
2007
IEEE
14 years 5 months ago
Model-Driven Simulation of Grid Scheduling Strategies
Simulation studies of Grid scheduling strategies require representative workloads to produce dependable results. Real production Grid workloads have shown diverse correlation stru...
Hui Li, Rajkumar Buyya
ASAP
2007
IEEE
91views Hardware» more  ASAP 2007»
14 years 6 months ago
Mapping and Topology Customization Approaches for Application-Specific STNoC Designs
Gianluca Palermo, Giovanni Mariani, Cristina Silva...
ASAP
2007
IEEE
144views Hardware» more  ASAP 2007»
14 years 6 months ago
A High-Throughput Programmable Decoder for LDPC Convolutional Codes
In this paper, we present and analyze a novel decoder architecture for LDPC convolutional codes (LDPCCCs). The proposed architecture enables high throughput and can be programmed ...
Marcel Bimberg, Marcos B. S. Tavares, Emil Mat&uac...
ASAP
2007
IEEE
136views Hardware» more  ASAP 2007»
14 years 6 months ago
0/1 Knapsack on Hardware: A Complete Solution
We present a memory efficient, practical, systolic, parallel architecture for the complete 0/1 knapsack dynamic programming problem, including backtracking. This problem was inte...
K. Nibbelink, S. Rajopadhye, R. McConnell
ASAP
2007
IEEE
123views Hardware» more  ASAP 2007»
14 years 6 months ago
A memcpy Hardware Accelerator Solution for Non Cache-line Aligned Copies
In this paper, we present a hardware solution to perform non cache-line aligned memory copies allowing the commonly used memcpy function to cope with word copies. The main purpose...
Filipa Duarte, Stephan Wong
ASAP
2007
IEEE
122views Hardware» more  ASAP 2007»
14 years 6 months ago
Parallelizing HMMER for Hardware Acceleration on FPGAs
Profile based Hidden Markov Model is a widely used tool in bioinformatics. While being very valuable to biologists, it is extremely compute intensive and suffers from prohibitive...
Steven Derrien, Patrice Quinton
ASAP
2007
IEEE
93views Hardware» more  ASAP 2007»
14 years 6 months ago
LNS Subtraction Using Novel Cotransformation and/or Interpolation
The Logarithmic Number System (LNS) makes multiplication, division and powering easy, but subtraction is expensive. Cotransformation converts the difficult operation of logarithm...
Panagiotis D. Vouzis, Sylvain Collange, Mark G. Ar...
ASAP
2007
IEEE
95views Hardware» more  ASAP 2007»
14 years 6 months ago
Performance Evaluation of Probe-Send Fault-tolerant Network-on-chip Router
With increasing reliability concerns for current and next generation VLSI technologies, fault-tolerance is fast becoming an integral part of system-on-chip and multicore architect...
Sumit D. Mediratta, Jeffrey T. Draper
ASAP
2007
IEEE
85views Hardware» more  ASAP 2007»
14 years 6 months ago
Windowed FIFOs for FPGA-based Multiprocessor Systems
Kai Huang, D. Grunert, Lothar Thiele