Sciweavers

DATE
2009
IEEE
86views Hardware» more  DATE 2009»
14 years 6 months ago
A power-efficient migration mechanism for D-NUCA caches
D-NUCA L2 caches are able to tolerate the increasing wire delay effects due to technology scaling thanks to their banked organization, broadcast line search and data promotion/dem...
Alessandro Bardine, Manuel Comparetti, Pierfrances...
ICCD
2003
IEEE
129views Hardware» more  ICCD 2003»
14 years 8 months ago
Reducing dTLB Energy Through Dynamic Resizing
Translation Look-aside Buffer (TLB), which is small Content Addressable Memory (CAM) structure used to translate virtual addresses to physical addresses, can consume significant ...
Victor Delaluz, Mahmut T. Kandemir, Anand Sivasubr...
DAC
2005
ACM
15 years 12 days ago
Dynamic slack reclamation with procrastination scheduling in real-time embedded systems
Leakage energy consumption is an increasing concern in current and future CMOS technologygenerations. Procrastination scheduling, where task execution can be delayed to maximize t...
Ravindra Jejurikar, Rajesh K. Gupta