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39
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DAC
2008
ACM
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Computer Architecture
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DAC 2008
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Driver waveform computation for timing analysis with multiple voltage threshold driver models
15 years 17 days ago
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www.ece.northwestern.edu
This paper introduces an accurate and efficient electrical analysis of logic gates modeled as Multiple Voltage Threshold Models (MVTM) loaded by the associated interconnect. MVTMs...
Peter Feldmann, Soroush Abbaspour, Debjit Sinha, G...
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