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ISCAS
2007
IEEE
202views Hardware» more  ISCAS 2007»
14 years 5 months ago
A VLSI Architecture for a Fast Computation of the 2-D Discrete Wavelet Transform
In this paper, an efficient VLSI architecture for a fast computation of the 2-D discrete wavelet transform (DWT) is proposed. The architecture employing a three-stage cascade in p...
Chengjun Zhang, Chunyan Wang, M. Omair Ahmad
VLSID
2007
IEEE
99views VLSI» more  VLSID 2007»
14 years 11 months ago
Low Power Implementation for Minimum Norm Sorting and Block Upper Tri-angularization of Matrices used in MIMO Wireless Systems
Multiple Input - Multiple Output (MIMO) wireless technology involves highly complex vectors and matrix computations which are directly related to increased power and area consumpt...
Zahid Khan, Tughrul Arslan, John S. Thompson, Ahme...