SIGSOFT
2010
ACM
13 years 8 months ago
2010
ACM
It is widely believed that program analysis can be more closely targeted to the needs of programmers if the program is accompanied by further redundant documentation. This may inc...
FMCAD
2008
Springer
14 years 12 days ago
2008
Springer
Performing synthesis and verification in isolation has two undesirable consequences: (1) verification runs the risk of becoming intractable, and (2) strong sequential optimization...
DSD
2007
IEEE
14 years 2 months ago
2007
IEEE
We compare the complexity of "internal" and "external" equivalence checking. The former is meant for proving the correctness of a synthesis transformation by w...
DAC
2007
ACM
14 years 2 months ago
2007
ACM
When designers create RTL models from a system-level specification, arrays in the system-level model are often implemented as memories in the RTL. Knowing the correspondence betwe...
DAC
2007
ACM
14 years 2 months ago
2007
ACM
It has long been the practice to create models in C or C++ for architectural studies, software prototyping and RTL verification in the design of Systems-on-Chip (SoC). It is often...
ASPDAC
2009
ACM
14 years 3 months ago
2009
ACM
Iterative retiming and resynthesis is a powerful way to optimize sequential circuits but its massive adoption has been hampered by the hardness of verification. This paper tackle...
DATE
2010
IEEE
14 years 4 months ago
2010
IEEE
Abstract—Behavioral synthesis is the compilation of an Electronic system-level (ESL) design into an RTL implementation. We present a suite of optimizations for equivalence checki...
MEMOCODE
2008
IEEE
14 years 5 months ago
2008
IEEE
Equivalence checking is a classical verification method determining if a finite-state concurrent system (protocol) satisfies its desired external behaviour (service) by compari...
GLVLSI
2008
IEEE
14 years 5 months ago
2008
IEEE
Novel nano-scale devices have shown promising potential to overcome physical barriers faced by complementary metaloxide semiconductor (CMOS) technology in future circuit design. H...
ICCAD
2007
IEEE
14 years 7 months ago
2007
IEEE
Retiming and resynthesis are among the most important techniques for practical sequential circuit optimization. However, their applicability is much limited due to verification c...