ICCAD
2000
IEEE
13 years 11 months ago
2000
IEEE
This paper describes an algorithm for simultaneous gate sizing and fanout optimization along the timing-critical paths in a circuit. First, a continuous-variable delay model that ...
ISLPED
2005
ACM
14 years 28 days ago
2005
ACM
This paper addresses the problem of low-power fanout optimization with multiple threshold voltage inverters. Introducing splitting and merging conversions that preserve delay, pow...