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DATE
1997
IEEE
116views Hardware» more  DATE 1997»
14 years 3 months ago
A new approach to build a low-level malicious fault list starting from high-level description and alternative graphs
In this paper a new approach is presented to build a list of faults to be used by the fault injection environment; the list is built starting from a high-level description of the ...
Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo...
FPL
2001
Springer
130views Hardware» more  FPL 2001»
14 years 3 months ago
FPGA-Based Fault Injection Techniques for Fast Evaluation of Fault Tolerance in VLSI Circuits
Designers of safety-critical VLSI systems are asking for effective tools for evaluating and validating their designs. Fault Injection is commonly adopted for this task, and its eff...
Pierluigi Civera, Luca Macchiarulo, Maurizio Rebau...
ACSC
2003
IEEE
14 years 4 months ago
FITS - A Fault Injection Architecture for Time-Triggered Systems
Time-triggered systems require a very high degree of temporal accuracy at critical stages during run time. While many software fault injection environments exist today, none of th...
René Hexel