In this paper, we present hthreads, a unifying programming model for specifying application threads running within a hybrid CPU/FPGA system. Threads are specified from a single p...
Erik Anderson, Jason Agron, Wesley Peck, Jim Steve...
It has been shown that a small number of FPGAs can significantly accelerate certain computing tasks by up to two or three orders of magnitude. However, particularly intensive lar...
Arun Patel, Christopher A. Madill, Manuel Salda&nt...
Current Radio Frequency Identification (RFID) systems generally have long design times and low tolerance to changes in specification. This paper describes a field programmable,...
Alex K. Jones, Raymond R. Hoare, Swapna R. Donthar...
— Many important applications are organized around long-lived, irregular sparse graphs (e.g., data and knowledge bases, CAD optimization, numerical problems, simulations). The gr...
Michael DeLorimier, Nachiket Kapre, Nikil Mehta, D...
We propose a novel defect-tolerant design methodology using Bloom filters for defect mapping for nanoscale computing devices. It is a general approach that can be used for any pe...
FPGAs are becoming more and more attractive for high precision scientific computations. One of the main problems in efficient resource utilization is the quadratically growing r...
This paper introduces the Low-Power Intelligent Tool Environment (LITE), an object oriented tool set designed for power visualization, analysis, and optimization. These tools lever...
Recently, platform FPGAs that integrate sequential processors with a spatial fabric have become prevalent. While these hybrid architectures ease the burden of integrating sequenti...