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ICDE
2011
IEEE
235views Database» more  ICDE 2011»
13 years 2 months ago
Fast data analytics with FPGAs
—The rapidly increasing amount of data available for real-time analysis (i.e., so-called operational business intelligence) is creating an interesting opportunity for creative ap...
Louis Woods, Gustavo Alonso
TVLSI
2010
13 years 5 months ago
Enhancing the Area Efficiency of FPGAs With Hard Circuits Using Shadow Clusters
There is a dramatic logic density gap between FPGAs and ASICs, and this gap is the main reason FPGAs are not cost-effective in high volume applications. Modern FPGAs narrow this ga...
Peter A. Jamieson, Jonathan Rose
FPL
2010
Springer
148views Hardware» more  FPL 2010»
13 years 8 months ago
FEM: A Step Towards a Common Memory Layout for FPGA Based Accelerators
FPGA devices are mostly utilized for customized application designs with heavily pipelined and aggressively parallel computations. However, little focus is normally given to the FP...
Muhammad Shafiq, Miquel Pericàs, Nacho Nava...
FPGA
2010
ACM
182views FPGA» more  FPGA 2010»
13 years 8 months ago
A comprehensive approach to modeling, characterizing and optimizing for metastability in FPGAs
Metastability is a phenomenon that can cause system failures in digital circuits. It may occur whenever signals are being transmitted across asynchronous or unrelated clock domain...
Doris Chen, Deshanand Singh, Jeffrey Chromczak, Da...
ERSA
2010
159views Hardware» more  ERSA 2010»
13 years 8 months ago
Acceleration of FPGA Fault Injection Through Multi-Bit Testing
SRAM-based FPGA devices are an attractive option for data processing on space-based platforms, due to high computational capabilities and a lower power envelope than traditional pr...
Grzegorz Cieslewski, Alan D. George, Adam Jacobs
ERSA
2010
199views Hardware» more  ERSA 2010»
13 years 8 months ago
Reconfigurable Sparse Matrix-Vector Multiplication on FPGAs
Cache-based, general purpose CPUs perform at a small fraction of their maximum floating point performance when executing memory-intensive simulations, such as those required for sp...
Russell Tessier, Salma Mirza, J. Blair Perot
OOPSLA
2010
Springer
13 years 9 months ago
From OO to FPGA: fitting round objects into square hardware?
Consumer electronics today such as cell phones often have one or more low-power FPGAs to assist with energyintensive operations in order to reduce overall energy consumption and i...
Stephen Kou, Jens Palsberg
VLSISP
2008
103views more  VLSISP 2008»
13 years 9 months ago
Power Signature Watermarking of IP Cores for FPGAs
In this paper, we introduce a new method for watermarking of IP cores for FPGA architectures where the signature (watermark) is detected at the power supply pins of the FPGA. This ...
Daniel Ziener, Jürgen Teich
BMCBI
2010
109views more  BMCBI 2010»
13 years 11 months ago
FPGA acceleration of the phylogenetic likelihood function for Bayesian MCMC inference methods
Background: Likelihood (ML)-based phylogenetic inference has become a popular method for estimating the evolutionary relationships among species based on genomic sequence data. Th...
Stephanie Zierke, Jason D. Bakos
TREC
2007
13 years 12 months ago
Exegy at TREC 2007 Million Query Track
Exegy’s submission for the TREC 2007 million query track consisted of results obtained by running the queries against the raw data, i.e., the data was not indexed. The hardwarea...
Naveen Singla, Ronald S. Indeck